| TVL1 |
Analyzing the Effect of Clock Jitter on Self-Oscillating Sigma Delta Modulators |
2017-2018 |
|
| TVL10 |
High-Speed and Energy-Efficient Carry Skip Adder Operating Under a Wide Range of Supply Voltage Levels |
2017-2018 |
|
| TVL11 |
Low-Cost High-Performance VLSI Architecture for Montgomery Modular Multiplication |
2017-2018 |
|
| TVL12 |
A High-Performance FIR Filter Architecture for Fixed and Reconfigurable Applications |
2017-2018 |
|
| TVL13 |
Efficient Dynamic Virtual Channel Organization and Architecture for NoC Systems. |
2017-2018 |
|
| TVL14 |
Improving Nested Loop Pipelining on Coarse-Grained Reconfigurable Architectures |
2017-2018 |
|
| TVL15 |
One-Cycle Correction of Timing Errors in Pipelines With Standard Clocked Elements |
2017-2018 |
|
| TVL16 |
Analytical SPICE-Compatible Model of Schottky-Barrier-Type GNRFETs With Performance Analysis |
2017-2018 |
|
| TVL17 |
A New Optimal Algorithm for Energy Saving in Embedded System With Multiple Sleep Modes |
2017-2018 |
|
| TVL18 |
A Novel Quantum-Dot Cellular Automata X-bit × 32-bit SRAM |
2017-2018 |
|
| TVL19 |
Input-Based Dynamic Reconfiguration of Approximate Arithmetic Units for Video Encoding |
2017-2018 |
|
| TVL2 |
Hypergraph Based Minimum Arborescence Algorithm for the Optimization and Reoptimization of Multiple Constant Multiplications |
2017-2018 |
|
| TVL20 |
Ultralow-Energy Variation-Aware Design: Adder Architecture Study |
2017-2018 |
|
| TVL21 |
SRAM-Based Unique Chip Identifier Techniques |
2017-2018 |
|
| TVL22 |
Implementing Minimum-Energy-Point Systems With Adaptive Logic |
2017-2018 |
|
| TVL23 |
On Efficient Retiming of Fixed-Point Circuits |
2017-2018 |
|
| TVL24 |
Hardware and Energy-Efficient Stochastic LU Decomposition Scheme for MIMO Receivers |
2017-2018 |
|
| TVL25 |
Distributed Sensor Network-on-Chip for Performance Optimization of Soft-Error-Tolerant Multiprocessor System-on-Chip |
2017-2018 |
|
| TVL26 |
Concept, Design, and Implementation of Reconfigurable CORDIC |
2017-2018 |
|
| TVL27 |
A New CDMA Encoding/Decoding Method for on-Chip Communication Network |
2017-2018 |
|
| TVL3 |
A High-Throughput Energy-Efficient Implementation of Successive Cancellation Decoder for Polar Codes Using Combinational Logic |
2017-2018 |
|
| TVL4 |
Adaptive Multibit Crosstalk-Aware Error Control Coding Scheme for On-Chip Communication |
2017-2018 |
|
| TVL5 |
A Method to Design Single Error Correction Codes With Fast Decoding for a Subset of Critical Bits |
2017-2018 |
|
| TVL6 |
Multiple Constant Multiplication Algorithm for High-Speed and Low-Power Design |
2017-2018 |
|
| TVL7 |
CORDIC II: A New Improved CORDIC Algorithm |
2017-2018 |
|
